SAMC: a code compression algorithm for embedded processors

In this paper we present a method for reducing the memory requirements of an embedded system by using code compression. We compress the instruction segment of the executable running on the embedded system and we show how to design a run-time decompression unit to decompress code on the y before execution. Our algorithm uses arithmetic coding in combination with a Markov model which is adapted to the instruction set and the application. We provide experimental results on two architectures, Analog Devices Sharc and ARM's ARM and Thumb instruction sets, and show that programs can often be reduced more than 50%. Furthermore, we suggest a table-based design which allows multi-bit decoding to speed up de-compression.